FYSS6410 Digital Electronics (4 cr)

Study level:
Advanced studies
Grading scale:
0-5
Language:
English, Finnish
Responsible organisation:
Department of Physics
Curriculum periods:
2024-2025, 2025-2026, 2026-2027, 2027-2028

Description

  • Boolean algebra

  • Simplification of switching functions by K-maps and Quine-McCluskey method.

  • Logic families: NMOS, CMOS, TTL, ECL

  • Combinational logic design principles and several applications.

  • Latches (SR, D) and flip-flops (D, JK, T, Master-Slave SR).

  • Synchronous counters.

  • Synthesis of synchronous sequential circuits.

  • Basics of PAL, PLA, ROM and RAM circuits. 

  • VHDL

Learning outcomes

After the course the student is able to

  • describe the basics of Boolean algebra.

  • solve simplification problems of switching functions.

  • recognize different logic families.

  • explain design principles and implementation of combinational logic.

  • explain static and dynamic hazards.

  • describe programmable logic devices.

  • explain design principles of synchronous sequential circuits. 

Description of prerequisites

FYSS6301 Electronics, part A and FYSS6302 Electronics, part B 

Study materials

Lecture slides 

Literature

  • John F. Wakerly. DIGITAL DESIGN: Principles and Practices, fourth edition. ISBN 0-13-186389-4.
  • Victor P. Nelson, H. Troy Nagle, J. David Irwin, Bill D. Carrol. DIGITAL LOGIC CIRCUIT ANALYSIS & DESIGN. Prentice hall. ISBN 0-13-463894-8.

Completion methods

Method 1

Evaluation criteria:
The content of the course is studied by doing simulations and finally a guided practical measurement. The grade is based on the final exam.
Time of teaching:
Period 3, Period 4
Select all marked parts
Parts of the completion methods
x

Independent study (4 cr)

Type:
Independent study
Grading scale:
0-5
Language:
English, Finnish

Teaching